Black Box Polynomial Identity Testing of Depth-3 Arithmetic Circuits with Bounded Top Fan-in

نویسندگان

  • Zohar S. Karnin
  • Amir Shpilka
چکیده

In this paper we consider the problem of determining whether an unknown arithmetic circuit, for which we have oracle access, computes the identically zero polynomial. Our focus is on depth-3 circuits with a bounded top fan-in. We obtain the following results. 1. A quasi-polynomial time deterministic black-box identity testing algorithm for ΣΠΣ(k) circuits (depth-3 circuits with top fan-in equal k). 2. A randomized black-box algorithm for identity testing of ΣΠΣ(k) circuits, that uses a polylogarithmic number of random bits, and makes a single query to the black-box. 3. A polynomial time deterministic black-box identity testing algorithm for multilinear ΣΠΣ(k) circuits (each multiplication gate computes a multilinear polynomial). Another way of stating our results is in terms of test sets for the underlying circuit model. A test set is a set of points such that if two circuits give the same value on every point of the set then they compute the same polynomial. Thus, our first result gives an explicit test set, of quasi-polynomial size, for ΣΠΣ(k) circuits. Our second result yields an explicit test set that any two different ΣΠΣ(k) circuits are different on most points of the set. Our last result gives an explicit polynomial size test set for multilinear ΣΠΣ(k) circuits. Prior to our work, only depth-2 circuits (circuits computing sparse polynomials) had efficient deterministic black-box identity testing algorithms (in other words, polynomial size test sets). Depth-3 circuits were previously studied in the non black-box model (i.e. when the circuit is given as input), and a polynomial time deterministic algorithm for identity testing was found [KS06]. The question of giving efficient black-box polynomial identity testing algorithm for ΣΠΣ(3) circuits was raised by Klivans and Spielman [KS01], and so, in particular, we answer this question. The proof technique involves a construction of a family of affine subspaces that have a rankpreserving property, that is inspired by the construction of linear seeded extractors for affine sources of Gabizon and Raz [GR05], and a theorem regarding the structure of identically zero depth-3 circuits with bounded top fan-in of [DS06]. ∗Faculty of Computer Science, Technion, Haifa 32000, Israel. Email: {zkarnin,shpilka}@cs.technion.ac.il. This research was supported by the Israel Science Foundation (grant number 439/06). 1 Electronic Colloquium on Computational Complexity, Revision 1 of Report No. 42 (2007)

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عنوان ژورنال:
  • Electronic Colloquium on Computational Complexity (ECCC)

دوره 14  شماره 

صفحات  -

تاریخ انتشار 2007